- Important information
- New features
- Known problems
- Program corrections
- User documentation corrections
- Miscellaneous
- Release history
Important information
-
To avoid the space-consuming tables used for character classification (
ctype.h
), define the preprocessor symbol__NO_CTYPE_TABLES
before thectype.h
file is included. -
The compiler now avoids the LDRD instruction with the base register in list when generating code for Cortex-M3. This is to work around the Cortex-M3 erratum 602117.
New features
- None
Known problems
-
If your code contains hundreds of global variables and you compile it at a high optimization level, the compilation time might be very long.
[EW14199] -
Special function registers (SFRs) declared as write-only in the header files included with the product are not treated as such by the compiler. The generated code may incorrectly use read-modify-writeback sequences.
[EW14302] -
The C/C++ library header file
time.h
declares the library functionmktime
. When called with a negative value in the broken-down time componenttm_isdst
, which is part of thetm
struct function parameter,mktime
fails to determine whether Daylight Saving Time is active for the specified time or not.
[EW14632] -
The DLIB4 library function
fpclassify()
incorrectly returnsFP_NORMAL
, instead ofFP_SUBNORMAL
, when supplied with a subnormal number.
[EW21098] -
Small
memcpy
calls might be transformed to assignments even if the source or destination address has wrong alignment.
[EW21193]
Program corrections
-
cstartup_M.c
now includes default interrupt handlers.
[EW21314] -
Expressions on the form
if (expr < 0) v = -expr;
are no longer optimized incorrectly.
[EW21340] -
A test inside a loop is no longer optimized incorrectly if
a) the loop had constant values for the initial and the final iteration,
b) the test compared an expression to a constant, and
c) the calculation of the expression would overflow or underflow for either the initial or final iteration.
[EW21363] -
Complex |-expressions no longer cause infinite loops during optimization.
[EW21380] -
Registers might be spilled to the stack frame when there are more live variables than registers. A spilled large register parameter (more than 8 bytes) no longer results in an internal error.
[EW21386] -
The linker is now more relaxed concerning attribute checking when linking with explicitly specified libraries.
[EW21387] -
Absolute addressed variable accesses no longer loose the
volatile
attribute during optimization.
[EW21400] -
Debug information for classes inheriting from a base class whose primary base was inherited virtually is no longer generated incorrectly. The old problem could result in incorrect display of base classes in C-SPY.
[EW21411] -
An error from the assembler in inline assembler code is no longer reported as a compiler internal error.
[EW21436] -
The compiler now encodes the character value 255 in a string literal using an escape sequence, to work around the fact that the assembler interprets such a value as end of file.
[EW21443] -
Registers are no longer renamed in situations where unused registers become used after renaming, to avoid situations where such registers would not be saved on the stack.
[EW21449] -
The compiler now generates correct code instead of reporting an internal error in situations where an entry in a constant table is duplicated so that it can be reached by all its references.
[EW21471]
User documentation corrections
-
IAR C/C++ Development Guide for ARM® (DARM-4), new functions:
-
Page 162-163:
Cortex-R4F
is added to the list of recognized processors.
-
Page 172:
VFPv3
is added to the list of parameters of the--fpu
command line option.
-
Page 284:
__ARMVFP__
is defined to 3 for VFPv3.
-
Page 162-163:
-
IAR C/C++ Development Guide for ARM® (DARM-4), clarifications and corrections:
-
Page 30: Replace
DATA_C
with.rodata
andDATA_I
with.data
(initializer in.data_init
).
-
Page 163: Append clarification to four of the recognized processors:
- ARM1176J (also alias for ARM1176JZ)
- ARM1176J-S (also alias for ARM1176JZ-S)
- ARM1176JF (also alias for ARM1176JZF)
- ARM1176JF-S (also alias for ARM1176JZF-S)
-
Page 240: Replace
CODE_I
with.textrw
.
-
Page 263 and 266:
__DMB()
,__DSB()
and__ISB()
are also available for the ARM v6M architecture.
-
Page 30: Replace
Miscellaneous
-
Generate workarounds for hardware problems:
-
Functional problem Core.1 in NXP device LPC2478: Incorrect update of the Abort Link register in Thumb state.
Workaround generated withiccarm --enable_hardware_workaround=NXP_Core.1
-
Release history
Copyright © 1999-2009 IAR Systems AB.