IAR Information Center for Arm

• Important information
• New features
• Known problems
• Program corrections
• User guide corrections
• Miscellaneous
• Release history

Important information

• Changes in implementation of CMSIS intrinsics in version 8.20

  The implementation of the CMSIS intrinsic interface is no longer based on IAR's intrinsics.h. As a consequence of that some intrinsics that was previously declared when the CMSIS header was included are no longer declared.

  Examples of these intrinsics include __LDREX(), __STREX() and __enable_interrupt().

• Changed size of wchar_t in version 8.10 and 8.11

  Object files following the ARM ABI has a runtime attribute indicating the size of wchar_t.

  In EWARM version 7.80 and earlier, the size of wchar_t was 2 bytes wide and the runtime attribute was set accordingly.

  For EWARM version 8.10, the size of wchar_t was 4 bytes wide but the value of the runtime attribute was not updated. Thus in 8.10 code is generated with 4 byte wide wchar_t but the object file is marked as if wchar_t is 2 bytes wide.

  In EWARM version 8.11 wchar_t is 4 bytes wide and the runtime attribute is set accordingly.

  Looking only at the wchar_t aspect this has the following implications:

  • Combining object files built with 7.80 and 8.10 will not trigger any linker warning but if the application uses wchar_t, the behavior will be unpredictable.

  • Combining object files built with 8.10 and 8.11 will trigger a linker warning but the application should work even if it uses wchar_t.

  • Combining object files built with 7.80 and 8.11 will trigger a linker warning and if the application uses wchar_t, the behavior will be unpredictable.

• Changed C-STAT behaviour in version 7.60
  

  • The analysis engine has been improved to increase the analysis precision for both existing and added coding rules. This can have the effect that the number of issued messages for a file or project can differ compared to previous versions of C-STAT, even if the enabled checks are exactly the same.

  • C-STAT settings in an old IAR Embedded Workbench IDE or Eclipse project will be updated. Some checks will be renamed (they retain their enabled or disabled settings), some checks are removed, and many new checks are added (see above).

  • Importing settings for C-STAT checks from a file will use the same logic as used when updating the project settings, if the settings file is created with an old version of C-STAT.

• If you have implemented the time() function, you must rename it into __time32(). For more information see the Development guide.

• The --guard_calls command line option is introduced. Note: --guard_calls must always be used in applications written in EC++/C++ that need thread-safe library function calls. For more information see the Development guide.

  The --no_guard_calls command line option is removed.

  The --aeabi command line option has modified behavior: Guard calls are not used by default.
  Migration instructions from IAR C/C++ Compiler for ARM 5.x and 6.10.1 to IAR C/C++ Compiler for ARM 6.10.2:
  --aeabi (without --no_guard_calls) shall be replaced with --aeabi --guard_calls
--aeabi --no_guard_calls shall be replaced with --aeabi
  

• A special note on CMSIS integration:
  

  If your application source code includes CMSIS header files explicitly, then you should not select Project>Options...>General Options>Library Configuration>Use CMSIS. Some of the Cortex-M application examples include CMSIS source files explicitly. Do not select the option Use CMSIS in these projects.
  
  However, due to the evolution of the IAR C/C++ Compiler for ARM, older versions of CMSIS are incompatible with the current version of the compiler. One simple example of how to solve this issue is:
  a) Press F4 to bring up the erroneous source (header) file in the editor - in most cases named core_cm3.h.
  b) Right-click on the window tab of that editor window, choose File Properties....
  c) Remane the file - so the compiler won't find it any more.
  d) Modify project options: Select Project>Options...>General Options>Library Configuration>Use CMSIS.
  Steps a) to c) might need to be done for more than one file. Normally, the names of these files are core_cm0.h, core_cm3.h, core_cm4.h, core_cmFunc.h, and core_cmInstr.h.
  
  For more information about CMSIS integration in the IAR Embedded Workbench for ARM, see the Development guide.

• Not using interwork when compiling for ARM architecture v4 is deprecated
  

  For now, this mode is supported like in earlier versions of the product, but new features, like C-RUN, will not have support for this mode.

• Deprecated features

  • --use_old_syntax

    The compiler option --use_old_syntax will be removed in future versions of the IAR C/C++ Compiler for ARM.

  • --interwork

    Future versions of the IAR C/C++ Compiler for ARM will assume --interwork when generating code for the ARMv4T architecture. There will be no option to generate non-interworking code for ARMv4T.

New features

• None.

Known Problems

• [EWARM-6531, TPB-3057] The compiler can emit spurious warnings (Pa118) about mixing boolean and non-boolean types in comparison expressions.

• [EWARM-5239, EW25660] Passing a parameter of type va_list to a C++ function, where the caller is defined in one object file and the callee in another, will result in a linker error if one of the two objects is built with EWARM 7.20 (or newer) and the other is built with EWARM 7.10 (or older).

• [EWARM-4921, EW24930] The overload resolution algorithm doesn't take into account template user conversion for argument deduction when finding out what built-in operator that is the best fit.

• [EWARM-4824, EW24720] MISRA-C:2004 rule 9.1 will not find all used uninitialized local variables.

Program Corrections

• [EWARM-6518, TPB-3053] In modules where the type of an integer bitfield is specified with an explicit signed modifier, the compiler will sometimes produce debug information where the signed integer types used this way are incorrectly given names that include the signed modifier. This can lead to a degraded debug experience, because it can cause the debugger to fail to unify structure types correctly.

• [EWARM-6454, TPB-3043] The compiler can terminate with an internal error in some cases involving an & operator where one operand is an integer constant expression involving a non-type template parameter.

• [EWARM-6416, TPB-3042] Compiling source code that contains an if constexpr statement with no else part, and a false condition causes the compiler to terminate with an internal error.

• [EWARM-6414, TPB-3027] The warning message Pe182 ("bitwise operation drops significant bits from a constant") can be issued incorrectly. It exists to warn about cases like

      if (uchar & 0x400)
          

  but it is sometimes issued in cases where no such problem exists.

User guide corrections

• None.

Miscellaneous

• Available workarounds for device erratas:

  • ARM Cortex-M3 errata 463764
    Core might freeze for SLEEPONEXIT single instruction ISR. More information is available on infocenter.arm.com.
    Workaround generated for functions with attribute __irq with iccarm --enable_hardware_workaround=arm463764. Supported from EWARM 5.41.

  • ARM Cortex-M3 errata 602117
    LDRD with base in list might result in incorrect base register when interrupted or faulted. From EWARM 5.20.3 the compiler/library avoids the LDRD instruction with the base register in list.

  • ARM Cortex-M3 errata 752419
    ARM Cortex-M4 errata 752770
    Interrupted loads to SP can cause erroneous behaviour. From EWARM 6.21 the compiler/library does not generate LDR SP instructions with writeback to Rn. Otherwise we allow the extra reads because the stack resides in RAM where multiple reads are acceptable.

  • ARM Cortex-M4 errata 776924
    VDIV or VSQRT instructions might not complete correctly when very short ISRs are used. IAR recommends the second workaround proposed by Arm: "Ensure that every interrupt service routine contains more than 2 instructions in addition to the exception return instruction." The background is that the compiler is unaware of interrupts since the Cortex-M architecture does not distinguish between ordinary functions and interrupt functions.

  • ARM Cortex-M7 errata 833872
    Flag setting instructions inside an IT block might cause incorrect execution of subsequent instructions. From EWARM 7.40, the compiler will the skip the IT transformation on this particular code pattern.

  • ARM Cortex-M3 errata 838469
    ARM Cortex-M4 errata 838869
    Store immediate overlapping exception return operation might vector to incorrect interrupt. Follow the guidelines in the errata and implement the workaround proposed by ARM by using __DSB(void) in applicable cases.

  • Functional problem Core.1 in NXP device LPC2478: Incorrect update of the Abort Link register in Thumb state.
    Workaround generated with iccarm --enable_hardware_workaround=NXP_Core.1

  • Functional problem in Stellaris devices: Non-word-aligned write to SRAM can cause an incorrect value to be loaded. More information is available on the Stellaris web site at www.ti.com/stellaris.
    Workaround generated with iccarm --enable_hardware_workaround=LM3S_NWA_SRAM_Write

  • Functional problem in Freescale Semiconductors MC9328MX1 (i.MX1), masks 0L44N, 1L44N, and 2L44N:
    The LDM instruction will in some cases not load the second register correctly. Workaround generated with iccarm --enable_hardware_workaround=920t-ldm2
    NOTE: The libraries in the current EWARM version are not built with this workaround. Use EWARM 6.50.6 and linker option --enable_hardware_workaround=920t-ldm2 to use libraries built with this hardware workaround.

• RTOS Threads and TLS

  The inc\c\DLib_Threads.h header file contains support for locks and thread-local storage (TLS) variables. This is useful for implementing thread support. For more information, see the header file.

• va_args

  The implementation of va_args functions has changed in IAR Embedded Workbench for ARM 7.20.1. It is no longer possible to compile the output of the preprocessor from an earlier version of the compiler. The original source code must be preprocessed again, using IAR Embedded Workbench for ARM 7.20.1.

Release history

See release history.