IAR Information Center for 8051

[EW8051-856, EW22805] Mixing assembler macros with the preprocessor directives can cause errors.
[EW8051-569, EW17003] Symbols with bit addresses for bit EQU label information in other than bit segments are displayed incorrectly in the linker map listing file. However, their actual address is correct.

[EW21359]
An uncontrolled termination of the assembler occuring if a MOV instruction was given three operands has been corrected.
The precedence order of assembler operators specified without parentheses now follows the order described in the Assembler Reference Guide.

[EW18916]
During some circumstances, assembler DEFINE statements that contained calculations based on symbolic values (for instance DEFINE symbol+3) would get calculated in the wrong way.

[EW17382]
A Fatal Error was generated if an EXTERN declared value was used as parameter to the ORG directive. The error message has been improved to clarify the problem.

[EW16357, EW16998]
Previously the assembler supported many undocumented register symbols; this support has now been removed. Instead they have been added to the header files for the respective derivative. In this way all SFRs are handled in the same way. The SFRs now directly supported by the assembler are ACC (accumulator), B, PSW, SP, DPL and DPH. Further the following bits in the PSW register are supported: AC, F0, RS1, RS0,OV, P.

[EW12015]
The DC8, DC16, DC24, DC32, DS8, DS16, DS24, DS32 assembler directives are now supported.
[EW12014]
The ODD directive now works as intended.