Release notes
for IAR Embedded Workbench for RISC-V version 1.30.2
Read about the latest features, new device support, and program corrections in the release notes.
- Highlights
- Important information
- Release notes for individual components
- Product packages
- Installation and license activation
Highlights
Version 1.30.2
Improved debug connection stability (1.30.2)
- Fixes to address minor stability issues during the initiation of a debug session or when programming flash memory.
Alignment of interrupt functions (1.30.2)
- A command line option to adjust the alignment of interrupt functions has been added, see "User guide updates" below.
Compiler and library optimizations
- New libraries to support and optimize performance for devices without the M extension
- Size-optimized libraries introduced as an option to the already existing speed-optimized versions
- Several new compiler optimizations for speed and size.
P extension DSP and Packed SIMD
- Support for the draft DSP and Packed SIMD specification, including intrinsic functions to support Andes DSP libraries.
Trace
- Function profiling makes it possible to see and analyze timing information for the functions in an application
- Code coverage shows the percentage of code that has been executed
- Support for on-chip RAM-buffered trace
- Enhanced support for the SiFive Insight debug solution.
Automatic interrupt vector setup
- Support for automated interrupt vector setup for devices from Andes and GigaDevice
MISRA C:2012 Amendment 1
- The Static analysis tool C-STAT has extended its coverage of the MISRA C:2012 Coding Standard and now fully supports MISRA C:2012 Amendment 1. This Amendment adds 14 additional rules to MISRA C:2012 with a focus on security concerns highlighted by the ISO C Secure Guidelines. Several of these address specific issues pertaining to the use of untrustworthy data, a well-known security vulnerability.
New devices
- The following devices from GigaDevice are now supported:
- GD32VF103C4T6, GD32VF103C6T6, GD32VF103C8T6, GD32VF103CBT6, GD32VF103R4T6, GD32VF103R6T6, GD32VF103R8T6, GD32VF103RBT6, GD32VF103T4U6, GD32VF103T6U6, GD32VF103T8U6, GD32VF103TBU6, GD32VF103V8T6, GD32VF103VBT6
IAR C/C++ Development Guide updates
-
New compiler command line option
-
--set_default_interrupt_alignment=alignment
Default value:128
Use this option to increase or decrease the alignment of interrupt functions.
Note: This option has no effect on the default interrupt handler that is used by the automatic interrupt setup system.
-
-
New compiler extended keywords
-
__task
Syntax See Syntax for type attributes used on functions, page 313 Description This keyword allows functions to relax the rules for preserving registers. Typically, the keyword is used on the start function for a task in an RTOS.
By default, functions save the contents of used preserved registers on the stack upon entry, and restore them at exit. Functions that are declared__task
, do not save all registers, and therefore require less stack space.
Because a function declared__task
can corrupt registers that are needed by the calling function, you should only use__task
on functions that do not return, or call such a function from assembler code.
The functionmain
can be declared__task
, unless it is explicitly called from the application. In real-time applications with more than one task, the root function of each task can be declared__task
.Example __task void my_handler(void);
-
__nmi
Syntax See Syntax for type attributes used on functions, page 313 Description Use it on an interrupt function to let the linker set up interrupts correctly for GigaDevice devices when using the option for automated interrupt vector setup. Note: This keyword is only intended for use by GigaDevice devices.
Example __nmi __interrupt void my_handler(void);
-
__preemptive
Syntax See Syntax for type attributes used on functions, page 313 Description Use it on interrupt functions to let the enter sequence save the CSRs mcause
andmepc
, and enable global interrupts. This allows nested interrupts. If the device needs to save additional CSRs, use#pragma preemptive=addr1 \{,addr2,...}
The enter sequence will automatically save the additional CSRs in addition tomcause
andmepc
.
The values will be automatically restored when the function exits.
Example __preemptive __interrupt void my_handler(void);
-
Important information
- Upgrade information
- Before you install
To avoid any problems, do not install this release in a directory where you have previously installed any older version of IAR Embedded Workbench. It is recommended that you either uninstall an earlier product, or install this release in a separate directory. As before, however, it is possible to install different products, all using the same version of the main application, in the same root directory.
- License renewal
The upgrade to this version requires a license renewal. This can be performed by starting the IAR License Manager and selecting License→Check for License Renewal, or by using the Light License Manager with the command
LightLicenseManager renew YOUR_PROD.EW
. -
Microsoft SCC interface no longer supported
Microsoft SCC-compatible version control systems are no longer supported by IAR Embedded Workbench.
- Microsoft Windows
Windows Vista and newer operating systems have a security mechanism called UAC (User Access Control). Disabling UAC will automatically grant you permission when a task requires administrative rights but this is not recommended because it will reduce the security of the computer. It is not necessary to run the IAR Embedded Workbench IDE as an administrator. However, if you are not, modifications to the installed product tree in C:\Program Files\IAR Systems might not work as intended and could give unexpected results. One example is opening and building projects directly from the installed product tree. The build will succeed, but the resulting files (object, list, ...) will not appear where expected. Instead all output files will be redirected by the OS to C:\Users\<user name>\AppData\Local\VirtualStore\Program Files\IAR Systems. To avoid this, the preferred way is to copy the examples to a location outside Program Files, either manually or automatically by opening them via the IAR Information Center.
- Known limitations
C++ RTTI and exceptions are not supported by the compiler.
The exception and interrupt catch functionality that can be enabled under Project>Options>I-jet>Breakpoints>Catch exceptions requires that the selected device has implemented triggers for instruction counter, interrupt catch, and exception catch. Consult the device vendor manual for details.
Flash breakpoints are not supported in this release.
#pragma vector
and automatic population of an interrupt vector are not supported for all devices. For such devices, interrupt vectors must be set up manually.Some of the flash loaders included in this release are macro-based and are to be considered temporary. Until a flash loader executing in RAM is implemented, the performance with respect to download speed will be limited.
IAR Embedded Workbench for RISC-V is not ABI-compliant with the RISC-V specification, and linking with libraries compiled with gcc is not supported in this release.
Support for SiFiveās evaluation bitstreams is no longer available for the Arty 35T development boards. The support for this hardware in IAR Embedded Workbench for RISC-V is deprecated and will be removed in the next release.
- Network licenses
For network licenses, IAR Embedded Workbench for RISC-V version 1.30 and later requires IAR License Server Tools version 2.17.2 or later. For more information, see technical note TN21842. The latest IAR License Server Tools are backwards compatible with previous IAR Embedded Workbench versions.
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