IAR Information Center for RISC-V

• Important information
• New features
• Known problems
• Program corrections
• User guide corrections
• Miscellaneous
• Release history

Important information

• None

New features

Compiler and library optimizations

• Several new compiler optimizations for speed and size
• New optimized libraries for sting handling

P extension DSP and Packed SIMD

• Support for the vectorized instructions from the draft DSP and Packed SIMD specification, including intrinsic functions to support Andes DSP libraries

Known problems

• None

Program corrections

• [RISCV-1961] Using the __task keyword on an interrupt function will generate an error.

User guide corrections

• Automatic setup of interrupts

  For supported devices (i.e. SiFive, Andes and GigaDevice devices), the linker can make sure that the interrupt vector is set up correctly.
  Depending on whether #pragma vector is used or not, it will either set up a vector table or a single interrupt.
  The setup is controlled by these symbols in the linker configuration file,
  • _auto_vector_setup - If this is set the linker will add the interrupt setup code to the C startup sequence. Remove this if you want to handle the setup manually.
  • _max_vector - This is set to the maximum number of entries in the interrupt vector table for the chosen device.
  • _CLIC/_CLIC_ANDES/_CLIC_GIGADEVICE/_CLINT - This tells the linker what kind of vector table that should be used.
  • _uses_clic - If this is set, the vector table will be the CLIC variant, otherwise it will be the CLINT variant. (Can only be used with _CLIC/_CLIC_ANDES/_CLIC_GIGADEVICE)

• New compiler command line option
  
  • --set_default_interrupt_alignment=alignment
    
    Default value: 128
    
    Use this option to increase or decrease the alignment of interrupt functions.
    Note: This option has no effect on the default interrupt handler that is used by the automatic interrupt setup system.
    


• New compiler extended keywords
  
  • __task
    
    

    Syntax	See Syntax for type attributes used on functions, page 313
    Description	This keyword allows functions to relax the rules for preserving registers. Typically, the keyword is used on the start function for a task in an RTOS. By default, functions save the contents of used preserved registers on the stack upon entry, and restore them at exit. Functions that are declared __task, do not save all registers, and therefore require less stack space. Because a function declared __task can corrupt registers that are needed by the calling function, you should only use __task on functions that do not return, or call such a function from assembler code. The function main can be declared __task, unless it is explicitly called from the application. In real-time applications with more than one task, the root function of each task can be declared __task.
    Example	__task void my_handler(void);

  • __nmi
    
    

    Syntax	See Syntax for type attributes used on functions, page 313
    Description	Use it on an interrupt function to let the linker set up interrupts correctly for GigaDevice devices when using the option for automated interrupt vector setup. Note: This keyword is only intended for use by GigaDevice devices.
    Example	__nmi __interrupt void my_handler(void);

  • __preemptive
    
    

    Syntax	See Syntax for type attributes used on functions, page 313
    Description	Use it on interrupt functions to let the enter sequence save the CSRs mcause and mepc, and enable global interrupts. This allows nested interrupts. If the device needs to save additional CSRs, use #pragma preemptive=addr1 \{,addr2,...} The enter sequence will automatically save the additional CSRs in addition to mcause and mepc. The values will be automatically restored when the function exits.
    Example	__preemptive __interrupt void my_handler(void);

Miscellaneous

• None

Release history

Version 1.30 2020-05-20

New features

Compiler and library optimizations

• New libraries to support and optimize performance for devices without M
• Size optimized libraries introduced as an option to the already existing speed optimized versions
• Several compiler optimizations for speed and size

P extension DSP and Packed SIMD

• Support for the draft DSP and Packed SIMD specification including intrinsic to support Andes DSP libraries.

Automatic interrupt vector setup

• Support for automated interrupt vector support is now also available for devices from Andes and GigaDevice

Version 1.21 2020-02-27

New features

• None

Program corrections

• None

Version 1.20 2019-11-29

New features

• Support for the base instruction set RV32E

RV32E is a base instruction set that targets smaller embedded devices. The register set is reduced to half of what is available in RV32I.

• Support for the standard extension for Atomic operations (A).

The standard extension A adds instructions that support atomic read, modify, and write actions to support synchronization between different HW processes that access the same memory.

• Support for interrupt vectors 

Support for #pragma vector for interrupt functions added.

Automatic setup of interrupts is available for the SiFive series of devices. Other devices still require manual setup.

• Stack protection

The IAR C/C++ Compiler for RISC-V now supports stack protection. A canary value will be placed between the stack variables and the return address so that the system can detect corruption of a function return address before the function returns to that address. The compiler will use heuristic to determine whether a function needs stack protection or not. If any defined local variable has the array type or a structure type that contains a member of array type, the function will need stack protection. See the IAR C/C++ Development Guide for more information.

• Optimized floating-point libraries for devices without an FPU

New floating-point libraries hand written in assembler language to increase performance. 

Program corrections

• None

Version 1.11 2019-09-10

New features

• None

Program corrections

• None

Version 1.10 2019-05-28

New features

• None

Program corrections

• None